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CVE-2026-53051

Estado: AnalizadaMedia (5.5)—

In the Linux kernel, the following vulnerability has been resolved:

PCI: tegra194: Fix CBB timeout caused by DBI access before core power-on

When PERST# is deasserted twice (assert -> deassert -> assert -> deassert), a CBB (Control Backbone) timeout occurs at DBI register offset 0x8bc (PCIE_MISC_CONTROL_1_OFF). This happens because pci_epc_deinit_notify() and dw_pcie_ep_cleanup() are called before reset_control_deassert() powers on the controller core.

The call chain that causes the timeout:

The DBI registers, including PCIE_MISC_CONTROL_1_OFF (0x8bc), are only accessible after the controller core is powered on via reset_control_deassert(pcie->core_rst). Accessing them before this point results in a CBB timeout because the hardware is not yet operational.

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Fix this by moving pci_epc_deinit_notify() and dw_pcie_ep_cleanup() to after reset_control_deassert(pcie->core_rst), ensuring the controller is fully powered on before any DBI register accesses occur.

Detalles técnicos trazas, registros y código del informe original
  pex_ep_event_pex_rst_deassert()
    pci_epc_deinit_notify()
      pci_epf_test_epc_deinit()
        pci_epf_test_clear_bar()
          pci_epc_clear_bar()
            dw_pcie_ep_clear_bar()
              __dw_pcie_ep_reset_bar()
                dw_pcie_dbi_ro_wr_en()      <- Accesses 0x8bc DBI register
    reset_control_deassert(pcie->core_rst)  <- Core powered on HERE

CVSS

Probabilidad de explotación (EPSS)

EPSS (Exploit Prediction Scoring System, de FIRST) estima la probabilidad de que una vulnerabilidad sea explotada en 30 días. Complementa a CVSS (impacto) y a CISA KEV (explotación confirmada).

Tecnologías afectadas (1)

Linux — Linux Kernel

CWE

Referencias

JSON original (NVD)

Mostrar
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  "id": "CVE-2026-53051",
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          "attackVector": "LOCAL",
          "baseSeverity": "MEDIUM",
          "vectorString": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H",
          "integrityImpact": "NONE",
          "userInteraction": "NONE",
          "attackComplexity": "LOW",
          "availabilityImpact": "HIGH",
          "privilegesRequired": "LOW",
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  "published": "2026-06-24T17:17:17.083",
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      "lang": "en",
      "value": "In the Linux kernel, the following vulnerability has been resolved:\n\nPCI: tegra194: Fix CBB timeout caused by DBI access before core power-on\n\nWhen PERST# is deasserted twice (assert -> deassert -> assert -> deassert),\na CBB (Control Backbone) timeout occurs at DBI register offset 0x8bc\n(PCIE_MISC_CONTROL_1_OFF). This happens because pci_epc_deinit_notify()\nand dw_pcie_ep_cleanup() are called before reset_control_deassert() powers\non the controller core.\n\nThe call chain that causes the timeout:\n\n  pex_ep_event_pex_rst_deassert()\n    pci_epc_deinit_notify()\n      pci_epf_test_epc_deinit()\n        pci_epf_test_clear_bar()\n          pci_epc_clear_bar()\n            dw_pcie_ep_clear_bar()\n              __dw_pcie_ep_reset_bar()\n                dw_pcie_dbi_ro_wr_en()      <- Accesses 0x8bc DBI register\n    reset_control_deassert(pcie->core_rst)  <- Core powered on HERE\n\nThe DBI registers, including PCIE_MISC_CONTROL_1_OFF (0x8bc), are only\naccessible after the controller core is powered on via\nreset_control_deassert(pcie->core_rst). Accessing them before this point\nresults in a CBB timeout because the hardware is not yet operational.\n\nFix this by moving pci_epc_deinit_notify() and dw_pcie_ep_cleanup() to\nafter reset_control_deassert(pcie->core_rst), ensuring the controller is\nfully powered on before any DBI register accesses occur."
    }
  ],
  "lastModified": "2026-07-21T17:23:46.997",
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