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CVE-2025-21991

Estado: ModificadaAlta (7.8)—

In the Linux kernel, the following vulnerability has been resolved:

x86/microcode/AMD: Fix out-of-bounds on systems with CPU-less NUMA nodes

Currently, load_microcode_amd() iterates over all NUMA nodes, retrieves their CPU masks and unconditionally accesses per-CPU data for the first CPU of each mask.

According to Documentation/admin-guide/mm/numaperf.rst:

Therefore, some node CPU masks may be empty and wouldn't have a "first CPU".

On a machine with far memory (and therefore CPU-less NUMA nodes): - cpumask_of_node(nid) is 0 - cpumask_first(0) is CONFIG_NR_CPUS - cpu_data(CONFIG_NR_CPUS) accesses the cpu_info per-CPU array at an index that is 1 out of bounds

Leer descripción completaMostrar menos

This does not have any security implications since flashing microcode is a privileged operation but I believe this has reliability implications by potentially corrupting memory while flashing a microcode update.

When booting with CONFIG_UBSAN_BOUNDS=y on an AMD machine that flashes a microcode update. I get the following splat:

Change the loop to go over only NUMA nodes which have CPUs before determining whether the first CPU on the respective node needs microcode update.

Detalles técnicos trazas, registros y código del informe original
  "Some memory may share the same node as a CPU, and others are provided as
  memory only nodes."

  UBSAN: array-index-out-of-bounds in arch/x86/kernel/cpu/microcode/amd.c:X:Y
  index 512 is out of range for type 'unsigned long[512]'
  [...]
  Call Trace:
   dump_stack
   __ubsan_handle_out_of_bounds
   load_microcode_amd
   request_microcode_amd
   reload_store
   kernfs_fop_write_iter
   vfs_write
   ksys_write
   do_syscall_64
   entry_SYSCALL_64_after_hwframe

  [ bp: Massage commit message, fix typo. ]

CVSS

Probabilidad de explotación (EPSS)

EPSS (Exploit Prediction Scoring System, de FIRST) estima la probabilidad de que una vulnerabilidad sea explotada en 30 días. Complementa a CVSS (impacto) y a CISA KEV (explotación confirmada).

🎯 Técnicas ATT&CK

Cómo se explota esta vulnerabilidad y qué consigue el atacante, en el lenguaje de MITRE ATT&CK.

Acceso local con privilegios (PR:L) permite corrupción de memoria durante actualización de microcode (out-of-bounds write). Requiere privs pero afecta integridad del sistema.

Inferido por nuestro agente de análisis a partir de la descripción oficial, el vector CVSS y la CWE, y comprobado por un supervisor. Puede contener errores.

🛡️ Mitigaciones ATT&CK que cubren estas técnicas

Tecnologías afectadas (1)

CWE

Referencias

JSON original (NVD)

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      "value": "In the Linux kernel, the following vulnerability has been resolved:\n\nx86/microcode/AMD: Fix out-of-bounds on systems with CPU-less NUMA nodes\n\nCurrently, load_microcode_amd() iterates over all NUMA nodes, retrieves their\nCPU masks and unconditionally accesses per-CPU data for the first CPU of each\nmask.\n\nAccording to Documentation/admin-guide/mm/numaperf.rst:\n\n  \"Some memory may share the same node as a CPU, and others are provided as\n  memory only nodes.\"\n\nTherefore, some node CPU masks may be empty and wouldn't have a \"first CPU\".\n\nOn a machine with far memory (and therefore CPU-less NUMA nodes):\n- cpumask_of_node(nid) is 0\n- cpumask_first(0) is CONFIG_NR_CPUS\n- cpu_data(CONFIG_NR_CPUS) accesses the cpu_info per-CPU array at an\n  index that is 1 out of bounds\n\nThis does not have any security implications since flashing microcode is\na privileged operation but I believe this has reliability implications by\npotentially corrupting memory while flashing a microcode update.\n\nWhen booting with CONFIG_UBSAN_BOUNDS=y on an AMD machine that flashes\na microcode update. I get the following splat:\n\n  UBSAN: array-index-out-of-bounds in arch/x86/kernel/cpu/microcode/amd.c:X:Y\n  index 512 is out of range for type 'unsigned long[512]'\n  [...]\n  Call Trace:\n   dump_stack\n   __ubsan_handle_out_of_bounds\n   load_microcode_amd\n   request_microcode_amd\n   reload_store\n   kernfs_fop_write_iter\n   vfs_write\n   ksys_write\n   do_syscall_64\n   entry_SYSCALL_64_after_hwframe\n\nChange the loop to go over only NUMA nodes which have CPUs before determining\nwhether the first CPU on the respective node needs microcode update.\n\n  [ bp: Massage commit message, fix typo. ]"
    },
    {
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      "value": "En el kernel de Linux, se ha resuelto la siguiente vulnerabilidad: x86/microcode/AMD: Se corrigió un error fuera de los límites en sistemas con nodos NUMA sin CPU. Actualmente, load_microcode_amd() itera sobre todos los nodos NUMA, recupera sus máscaras de CPU y accede incondicionalmente a los datos por CPU para la primera CPU de cada máscara. Según Documentation/admin-guide/mm/numaperf.rst: \"Algunas memorias pueden compartir el mismo nodo que una CPU, mientras que otras se proporcionan como nodos de solo memoria\". Por lo tanto, algunas máscaras de CPU de nodo podrían estar vacías y no tendrían una \"primera CPU\". En una máquina con memoria extensa (y, por lo tanto, nodos NUMA sin CPU): - cpumask_of_node(nid) es 0 - cpumask_first(0) es CONFIG_NR_CPUS - cpu_data(CONFIG_NR_CPUS) accede a la matriz por CPU cpu_info en un índice que es 1 fuera de los límites. Esto no tiene implicaciones de seguridad, ya que la actualización de microcódigo es una operación privilegiada, pero creo que tiene implicaciones de confiabilidad al potencialmente corromper la memoria durante la actualización de microcódigo. Al arrancar con CONFIG_UBSAN_BOUNDS=y en una máquina AMD que actualiza microcódigo. Recibo el siguiente mensaje: UBSAN: array-index-out-of-bounds en arch/x86/kernel/cpu/microcode/amd.c:X:Y el índice 512 está fuera de rango para el tipo 'unsigned long[512]' [...] Seguimiento de llamadas: dump_stack __ubsan_handle_out_of_bounds load_microcode_amd request_microcode_amd reload_store kernfs_fop_write_iter vfs_write ksys_write do_syscall_64 entry_SYSCALL_64_after_hwframe Cambie el bucle para que solo recorra los nodos NUMA que tengan CPU antes de determinar si la primera CPU en el nodo respectivo necesita una actualización de microcódigo. [bp: Mensaje de confirmación de Massage, corrección de error tipográfico.]"
    }
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