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CVE-2025-21895

Estado: AnalizadaMedia (4.7)—

In the Linux kernel, the following vulnerability has been resolved:

perf/core: Order the PMU list to fix warning about unordered pmu_ctx_list

Syskaller triggers a warning due to prev_epc->pmu != next_epc->pmu in perf_event_swap_task_ctx_data(). vmcore shows that two lists have the same perf_event_pmu_context, but not in the same order.

The problem is that the order of pmu_ctx_list for the parent is impacted by the time when an event/PMU is added. While the order for a child is impacted by the event order in the pinned_groups and flexible_groups. So the order of pmu_ctx_list in the parent and child may be different.

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To fix this problem, insert the perf_event_pmu_context to its proper place after iteration of the pmu_ctx_list.

The follow testcase can trigger above warning:

# perf record -e cycles --call-graph lbr -- taskset -c 3 ./a.out & # perf stat -e cpu-clock,cs -p xxx // xxx is the pid of a.out

test.c

The testcase first opens an LBR event, so it will allocate task_ctx_data, and then open tracepoint and software events, so the parent context will have 3 different perf_event_pmu_contexts. On inheritance, child ctx will insert the perf_event_pmu_context in another order and the warning will trigger.

[ mingo: Tidied up the changelog. ]

Detalles técnicos trazas, registros y código del informe original
 void main() {
        int count = 0;
        pid_t pid;

        printf("%d running\n", getpid());
        sleep(30);
        printf("running\n");

        pid = fork();
        if (pid == -1) {
                printf("fork error\n");
                return;
        }
        if (pid == 0) {
                while (1) {
                        count++;
                }
        } else {
                while (1) {
                        count++;
                }
        }
 }

CVSS

Probabilidad de explotación (EPSS)

EPSS (Exploit Prediction Scoring System, de FIRST) estima la probabilidad de que una vulnerabilidad sea explotada en 30 días. Complementa a CVSS (impacto) y a CISA KEV (explotación confirmada).

Tecnologías afectadas (1)

CWE

Referencias

JSON original (NVD)

Mostrar
{
  "id": "CVE-2025-21895",
  "cveTags": [],
  "metrics": {
    "cvssMetricV31": [
      {
        "type": "Primary",
        "source": "nvd@nist.gov",
        "cvssData": {
          "scope": "UNCHANGED",
          "version": "3.1",
          "baseScore": 4.7,
          "attackVector": "LOCAL",
          "baseSeverity": "MEDIUM",
          "vectorString": "CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:U/C:N/I:N/A:H",
          "integrityImpact": "NONE",
          "userInteraction": "NONE",
          "attackComplexity": "HIGH",
          "availabilityImpact": "HIGH",
          "privilegesRequired": "LOW",
          "confidentialityImpact": "NONE"
        },
        "impactScore": 3.6,
        "exploitabilityScore": 1
      }
    ]
  },
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              "lessThanOrEqual": "*"
            }
          ],
          "programFiles": [
            "kernel/events/core.c"
          ],
          "defaultStatus": "affected"
        }
      ]
    }
  ],
  "published": "2025-04-01T16:15:19.883",
  "references": [
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      "source": "416baaa9-dc9f-4396-8d5f-8c081fb06d67"
    },
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  ],
  "vulnStatus": "Analyzed",
  "weaknesses": [
    {
      "type": "Primary",
      "source": "nvd@nist.gov",
      "description": [
        {
          "lang": "en",
          "value": "CWE-362"
        }
      ]
    }
  ],
  "descriptions": [
    {
      "lang": "en",
      "value": "In the Linux kernel, the following vulnerability has been resolved:\n\nperf/core: Order the PMU list to fix warning about unordered pmu_ctx_list\n\nSyskaller triggers a warning due to prev_epc->pmu != next_epc->pmu in\nperf_event_swap_task_ctx_data(). vmcore shows that two lists have the same\nperf_event_pmu_context, but not in the same order.\n\nThe problem is that the order of pmu_ctx_list for the parent is impacted by\nthe time when an event/PMU is added. While the order for a child is\nimpacted by the event order in the pinned_groups and flexible_groups. So\nthe order of pmu_ctx_list in the parent and child may be different.\n\nTo fix this problem, insert the perf_event_pmu_context to its proper place\nafter iteration of the pmu_ctx_list.\n\nThe follow testcase can trigger above warning:\n\n # perf record -e cycles --call-graph lbr -- taskset -c 3 ./a.out &\n # perf stat -e cpu-clock,cs -p xxx // xxx is the pid of a.out\n\n test.c\n\n void main() {\n        int count = 0;\n        pid_t pid;\n\n        printf(\"%d running\\n\", getpid());\n        sleep(30);\n        printf(\"running\\n\");\n\n        pid = fork();\n        if (pid == -1) {\n                printf(\"fork error\\n\");\n                return;\n        }\n        if (pid == 0) {\n                while (1) {\n                        count++;\n                }\n        } else {\n                while (1) {\n                        count++;\n                }\n        }\n }\n\nThe testcase first opens an LBR event, so it will allocate task_ctx_data,\nand then open tracepoint and software events, so the parent context will\nhave 3 different perf_event_pmu_contexts. On inheritance, child ctx will\ninsert the perf_event_pmu_context in another order and the warning will\ntrigger.\n\n[ mingo: Tidied up the changelog. ]"
    },
    {
      "lang": "es",
      "value": "En el kernel de Linux, se ha resuelto la siguiente vulnerabilidad: perf/core: Ordenar la lista de PMU para corregir la advertencia sobre pmu_ctx_list desordenada Syskaller activa una advertencia debido a prev_epc->pmu != next_epc->pmu en perf_event_swap_task_ctx_data(). vmcore muestra que dos listas tienen el mismo perf_event_pmu_context, pero no en el mismo orden. El problema es que el orden de pmu_ctx_list para el padre se ve afectado por el momento en que se agrega un evento/PMU. Mientras que el orden para un hijo se ve afectado por el orden de los eventos en pinned_groups y flexible_groups. Por lo tanto, el orden de pmu_ctx_list en el padre y el hijo puede ser diferente. Para corregir este problema, inserte perf_event_pmu_context en su lugar correcto después de la iteración de pmu_ctx_list. El siguiente caso de prueba puede activar la advertencia anterior: # perf record -e cycles --call-graph lbr -- tasket -c 3 ./a.out & # perf stat -e cpu-clock,cs -p xxx // xxx es el pid de a.out test.c void main() { int count = 0; pid_t pid; printf(\"%d en ejecución\\n\", getpid()); sleep(30); printf(\"en ejecución\\n\"); pid = fork(); if (pid == -1) { printf(\"fork error\\n\"); return; } if (pid == 0) { while (1) { count++; } } else { while (1) { count++; } } } El caso de prueba primero abre un evento LBR, por lo que asignará task_ctx_data y luego abrirá los eventos de tracepoint y software, por lo que el contexto principal tendrá 3 perf_event_pmu_contexts diferentes. En caso de herencia, el ctx secundario insertará perf_event_pmu_context en otro orden y se activará la advertencia. [mingo: Se ordenó el registro de cambios.]"
    }
  ],
  "lastModified": "2026-06-17T08:44:33.203",
  "configurations": [
    {
      "nodes": [
        {
          "negate": false,
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}