CVE-2024-30212
If a SCSI READ(10) command is initiated via USB using the largest LBA (0xFFFFFFFF) with it's default block size of 512 and a count of 1,
the first 512 byte of the 0x80000000 memory area is returned to the user. If the block count is increased, the full RAM can be exposed.
The same method works to write to this memory area. If RAM contains pointers, those can be - depending on the application - overwritten to
return data from any other offset including Progam and Boot Flash.
CVSS
- Base score
- 7
- Version
- 4.0
- Vector
- CVSS:4.0/AV:P/AC:L/AT:N/PR:N/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X
Exploitation probability (EPSS)
- Probability of exploitation in the next 30 days
- 0.57 %
- Percentile among all scored CVEs
- 47
- Score date
- 11/3/2026
EPSS (Exploit Prediction Scoring System, FIRST) estimates how likely a vulnerability is to be exploited in the wild within 30 days. It complements CVSS (impact) and CISA KEV (confirmed exploitation).
Public exploits
Exploit code or detection templates are publicly available. This is not the same as confirmed active exploitation (KEV), but it raises the risk: patch with priority.
- Proof of concept on GitHub (unverified) · List of proofs of concept on GitHub
⚠️ GitHub proofs of concept are not verified: some are fake or contain malware. Never run them outside an isolated lab.
CWEs
- CWE-190
References
Show 6 references
- https://github.com/Fehr-GmbH/blackleak
- https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md
- https://github.com/Microchip-MPLAB-Harmony/core/commit/d4608a4f1a140bd899cd4337cdbfb343a4339216
- https://github.com/Fehr-GmbH/blackleak
- https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md
- https://github.com/Microchip-MPLAB-Harmony/core/commit/d4608a4f1a140bd899cd4337cdbfb343a4339216
Raw JSON (NVD)
Show
{
"id": "CVE-2024-30212",
"cveTags": [],
"metrics": {
"ssvcV203": [
{
"source": "134c704f-9b21-4f2e-91b3-4a467353bcc0",
"ssvcData": {
"id": "CVE-2024-30212",
"role": "CISA Coordinator",
"options": [
{
"exploitation": "poc"
},
{
"automatable": "no"
},
{
"technicalImpact": "partial"
}
],
"version": "2.0.3",
"timestamp": "2024-08-07T14:20:02.167062Z"
}
}
],
"cvssMetricV40": [
{
"type": "Secondary",
"source": "dc3f6da9-85b5-4a73-84a2-2ec90b40fca5",
"cvssData": {
"Safety": "NOT_DEFINED",
"version": "4.0",
"Recovery": "NOT_DEFINED",
"baseScore": 7,
"Automatable": "NOT_DEFINED",
"attackVector": "PHYSICAL",
"baseSeverity": "HIGH",
"valueDensity": "NOT_DEFINED",
"vectorString": "CVSS:4.0/AV:P/AC:L/AT:N/PR:N/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X",
"exploitMaturity": "NOT_DEFINED",
"providerUrgency": "NOT_DEFINED",
"userInteraction": "NONE",
"attackComplexity": "LOW",
"attackRequirements": "NONE",
"privilegesRequired": "NONE",
"subIntegrityImpact": "NONE",
"vulnIntegrityImpact": "HIGH",
"integrityRequirement": "NOT_DEFINED",
"modifiedAttackVector": "NOT_DEFINED",
"subAvailabilityImpact": "NONE",
"vulnAvailabilityImpact": "HIGH",
"availabilityRequirement": "NOT_DEFINED",
"modifiedUserInteraction": "NOT_DEFINED",
"modifiedAttackComplexity": "NOT_DEFINED",
"subConfidentialityImpact": "NONE",
"vulnConfidentialityImpact": "HIGH",
"confidentialityRequirement": "NOT_DEFINED",
"modifiedAttackRequirements": "NOT_DEFINED",
"modifiedPrivilegesRequired": "NOT_DEFINED",
"modifiedSubIntegrityImpact": "NOT_DEFINED",
"modifiedVulnIntegrityImpact": "NOT_DEFINED",
"vulnerabilityResponseEffort": "NOT_DEFINED",
"modifiedSubAvailabilityImpact": "NOT_DEFINED",
"modifiedVulnAvailabilityImpact": "NOT_DEFINED",
"modifiedSubConfidentialityImpact": "NOT_DEFINED",
"modifiedVulnConfidentialityImpact": "NOT_DEFINED"
}
}
]
},
"affected": [
{
"source": "dc3f6da9-85b5-4a73-84a2-2ec90b40fca5",
"affectedData": [
{
"repo": "https://github.com/Microchip-MPLAB-Harmony",
"vendor": "Microchip",
"modules": [
"memory"
],
"product": "MPLAB® Harmony 3 Core Module",
"versions": [
{
"status": "affected",
"version": "3.0.0",
"lessThan": "3.13.4",
"versionType": "semver"
}
],
"packageName": "core",
"programFiles": [
"drv_memory.c.ftl"
],
"defaultStatus": "unaffected",
"programRoutines": [
{
"name": "DRV_MEMORY_SetupXfer"
}
]
}
]
},
{
"source": "134c704f-9b21-4f2e-91b3-4a467353bcc0",
"affectedData": [
{
"cpes": [
"cpe:2.3:a:microchip:mplab_harmony:*:*:*:*:*:*:*:*"
],
"vendor": "microchip",
"product": "mplab_harmony",
"versions": [
{
"status": "affected",
"version": "3.0.0",
"lessThan": "3.13.4",
"versionType": "semver"
}
],
"defaultStatus": "unknown"
}
]
}
],
"published": "2024-05-28T16:15:15.673",
"references": [
{
"url": "https://github.com/Fehr-GmbH/blackleak",
"source": "dc3f6da9-85b5-4a73-84a2-2ec90b40fca5"
},
{
"url": "https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md",
"source": "dc3f6da9-85b5-4a73-84a2-2ec90b40fca5"
},
{
"url": "https://github.com/Microchip-MPLAB-Harmony/core/commit/d4608a4f1a140bd899cd4337cdbfb343a4339216",
"source": "dc3f6da9-85b5-4a73-84a2-2ec90b40fca5"
},
{
"url": "https://github.com/Fehr-GmbH/blackleak",
"source": "af854a3a-2127-422b-91ae-364da2661108"
},
{
"url": "https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md",
"source": "af854a3a-2127-422b-91ae-364da2661108"
},
{
"url": "https://github.com/Microchip-MPLAB-Harmony/core/commit/d4608a4f1a140bd899cd4337cdbfb343a4339216",
"source": "af854a3a-2127-422b-91ae-364da2661108"
}
],
"vulnStatus": "Deferred",
"weaknesses": [
{
"type": "Secondary",
"source": "dc3f6da9-85b5-4a73-84a2-2ec90b40fca5",
"description": [
{
"lang": "en",
"value": "CWE-190"
}
]
}
],
"descriptions": [
{
"lang": "en",
"value": "If a SCSI READ(10) command is initiated via USB using the largest LBA \n(0xFFFFFFFF) with it's default block size of 512 and a count of 1,\n\nthe first 512 byte of the 0x80000000 memory area is returned to the \nuser. If the block count is increased, the full RAM can be exposed.\n\nThe same method works to write to this memory area. If RAM contains \npointers, those can be - depending on the application - overwritten to\n\nreturn data from any other offset including Progam and Boot Flash."
},
{
"lang": "es",
"value": "Si se inicia un comando SCSI READ(10) a través de USB utilizando el LBA más grande (0xFFFFFFFF) con su tamaño de bloque predeterminado de 512 y un recuento de 1, los primeros 512 bytes del área de memoria 0x80000000 se devuelven al usuario. Si se aumenta el número de bloques, toda la RAM puede quedar expuesta. El mismo método funciona para escribir en esta área de memoria. Si la RAM contiene punteros, estos se pueden sobrescribir, según la aplicación, para devolver datos de cualquier otro desplazamiento, incluidos Progam y Boot Flash."
}
],
"lastModified": "2026-06-17T07:26:30.047",
"sourceIdentifier": "dc3f6da9-85b5-4a73-84a2-2ec90b40fca5"
}