AMD
AMD Athlon PRO 300ge Firmware: vulnerabilidades y CVE
AMD Athlon PRO 300ge Firmware tiene 7 vulnerabilidades publicadas, 0 de ellas en los últimos 12 meses. 0 son críticas y 0 figuran en el catálogo de explotación activa de CISA.
CVE7
Últimos 12 meses0
Críticas0
Explotadas activamente0
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Últimas vulnerabilidades
| CVE | Severidad | EPSS | Explotación activa | Publicada | Descripción |
|---|---|---|---|---|---|
| CVE-2022-23815 | Alta (8.2) | 0.16% | — | 13 ago 2024 | Improper bounds checking in APCB firmware may allow an attacker to perform an out of bounds write, corrupting the APCB entry, potentially leading to arbitrary code execution. |
| CVE-2021-26367 | Media (6) | 0.16% | — | 13 ago 2024 | A malicious attacker in x86 can misconfigure the Trusted Memory Regions (TMRs), which may allow the attacker to set an arbitrary address range for the TMR, potentially leading to a loss of integrity and availability. |
| CVE-2023-20521 | Media (5.7) | 0.26% | — | 14 nov 2023 | TOCTOU in the ASP Bootloader may allow an attacker with physical access to tamper with SPI ROM records after memory content verification, potentially leading to loss of confidentiality or a denial of service. |
| CVE-2023-20589 | Media (6.8) | 0.58% | — | 8 ago 2023 | An attacker with specialized hardware and physical access to an impacted device may be able to perform a voltage fault injection attack resulting in compromise of the ASP secure boot potentially leading to arbitrary… |
| CVE-2023-20588 | Media (5.5) | 11% | — | 8 ago 2023 | A division-by-zero error on some AMD processors can potentially return speculative data resulting in loss of confidentiality. |
| CVE-2023-20555 | Alta (7.8) | 0.32% | — | 8 ago 2023 | Insufficient input validation in CpmDisplayFeatureSmm may allow an attacker to corrupt SMM memory by overwriting an arbitrary bit in an attacker-controlled pointer potentially leading to arbitrary code execution in SMM. |
| CVE-2020-12965 | Alta (7.5) | 2.4% | — | 4 feb 2022 | When combined with specific software sequences, AMD CPUs may transiently execute non-canonical loads and store using only the lower 48 address bits potentially resulting in data leakage. |