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CVE-2022-27813

Estado: ModificadaAlta (8.2)—

Motorola MTM5000 series firmwares lack properly configured memory protection of pages shared between the OMAP-L138 ARM and DSP cores. The SoC provides two memory protection units, MPU1 and MPU2, to enforce the trust boundary between the two cores. Since both units are left unconfigured by the firmwares, an adversary with control over either core can trivially gain code execution on the other, by overwriting code located in shared RAM or DDR2 memory regions.

CVSS

Probabilidad de explotación (EPSS)

EPSS (Exploit Prediction Scoring System, de FIRST) estima la probabilidad de que una vulnerabilidad sea explotada en 30 días. Complementa a CVSS (impacto) y a CISA KEV (explotación confirmada).

Tecnologías afectadas (2)

Motorola — Mtm5400 FirmwareMotorola — Mtm5500 Firmware

CWE

Referencias

JSON original (NVD)

Mostrar
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          "timestamp": "2024-07-15T15:42:18.505018Z"
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          "userInteraction": "NONE",
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  "published": "2023-10-19T10:15:10.013",
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          "value": "CWE-1260"
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      "value": "Motorola MTM5000 series firmwares lack properly configured memory protection of pages shared between the OMAP-L138 ARM and DSP cores. The SoC provides two memory protection units, MPU1 and MPU2, to enforce the trust boundary between the two cores. Since both units are left unconfigured by the firmwares, an adversary with control over either core can trivially gain code execution on the other, by overwriting code located in shared RAM or DDR2 memory regions."
    },
    {
      "lang": "es",
      "value": "Los firmwares de la serie Motorola MTM5000 carecen de protección de memoria configurada correctamente para las páginas compartidas entre los núcleos OMAP-L138 ARM y DSP. El SoC proporciona dos unidades de protección de memoria, MPU1 y MPU2, para reforzar el límite de confianza entre los dos núcleos. Dado que los firmwares dejan ambas unidades sin configurar, un adversario con control sobre cualquiera de los núcleos puede obtener trivialmente la ejecución de código en el otro, sobrescribiendo el código ubicado en la RAM compartida o en las regiones de memoria DDR2."
    }
  ],
  "lastModified": "2026-06-17T04:37:33.693",
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